Wavebubble 2010 Hardware Test
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00001 00008 #ifndef MAIN_H_ 00009 #define MAIN_H_ 00010 00011 #define HW_REV_A //!< Wave Bubble 2010 hardware revision 00012 00013 #define SPICLK_PORT PORTC //!< SPI CLOCK Port for digital poti 00014 #define SPIDO_PORT PORTC //!< SPI DATA Port for digital poti 00015 #define SPICS_PORT PORTC //!< SPI CHIPSELECT Port for digital poti 00016 #define SPICLK_DDR DDRC //!< SPI CLOCK Direction for digital poti 00017 #define SPIDO_DDR DDRC //!< SPI DATA Direction for digital poti 00018 #define SPICS_DDR DDRC //!< SPI CHIPSELECT Direction for digital poti 00019 #define SPICLK 1 //!< SPI CLOCK Pin for digital poti 00020 #define SPIDO 2 //!< SPI DATA Pin for digital poti 00021 #define SPICS 3 //!< SPI CHIPSELECT Pin for digital poti 00022 00023 #define BANDWADJ1_RES 1 //!< Digital potentiometer for VCO1 00024 #define BANDWADJ2_RES 0 //!< Digital potentiometer for VCO2 00025 00026 #define FREQSET_DDR DDRC //!< Digital frequency set direction 00027 #define FREQSET_PORT PORTC //!< Digital frequency set port 00028 #define FREQSET PC4 //!< Digital frequency set pin 00029 00030 #define POWERON_PORT PORTB //!< Power ON switch port 00031 #define POWERON PB7 //!< Power ON switch pin 00032 #define POWERON_DDR DDRB //!< Power ON direction 00033 00034 #define POWERCTL1_PORT PORTB //!< Power control port VCO1 00035 #define POWERCTL1 PB7 //!< Power control pin VCO1 00036 #define POWERCTL1_DDR DDRB //!< Power control direction VCO1 00037 00038 #define POWERCTL2_PORT PORTD //!< Power control port VCO2 00039 #define POWERCTL2 PD3 //!< Power control pin VCO2 00040 #define POWERCTL2_DDR DDRD //!< Power control direction VCO2 00041 00042 #define LEDDDR DDRD //!< Direction for LED 00043 #define LEDPORT PORTD //!< Port for LED 00044 #define LED PD7 //!< Pin for LED 00045 00046 extern volatile char in_char; 00047 00048 extern void set_sawtooth_low(void); 00049 extern void set_sawtooth_high(void); 00050 extern void set_resistor(uint8_t rnum, uint8_t rval); 00051 extern void delay_ms(uint16_t ms); 00052 00053 #endif /* MAIN_H_ */