Wavebubble 2010 Hardware Test
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Go to the source code of this file.
Defines | |
#define | pll_set_rf(x, n) pll_set_freq(x, n, 0x1); |
#define | pll_set_if(x, n) pll_set_freq(x, n, 0x4); |
#define | PLLCLK_DDR DDRD |
PLL clock direction port. | |
#define | PLLCLK_PORT PORTD |
PLL clock output port. | |
#define | PLLCLK PD5 |
PLL clock pin. | |
#define | PLLDATA_DDR DDRD |
PLL data direction port. | |
#define | PLLDATA_PORT PORTD |
PLL data output port. | |
#define | PLLDATA PD6 |
PLL data pin. | |
#define | PLLLE_DDR DDRB |
PLL enable direction port. | |
#define | PLLLE_PORT PORTB |
PLL enable output port. | |
#define | PLLLE PB0 |
PLL enable pin. | |
#define | PLL_RFIN_DDR DDRC |
PLL RF lock detect direction port. | |
#define | PLL_IFIN_DDR DDRC |
PLL IF lock detect direction port. | |
#define | PLL_RFIN PC0 |
PLL RF lock detect pin. | |
#define | PLL_IFIN PC5 |
PLL IF lock detect pin. | |
#define | PLL_RFIN_PIN PINC |
PLL RF input port. | |
#define | PLL_IFIN_PIN PINC |
PLL IF input port. | |
#define | PLL_RFIN_PORT PORTC |
PLL RF output port. | |
#define | PLL_IFIN_PORT PORTC |
PLL IF output port. | |
Functions | |
void | pll_tx (uint32_t data, uint8_t addr) |
void | pll_init (void) |
void | pll_set_rcounter (uint16_t rcounter) |
void | pll_set_freq (uint16_t rf_freq, uint8_t prescaler, uint8_t reg) |
uint8_t | tune_rf (uint16_t freq) |
uint8_t | tune_if (uint16_t freq) |
uint8_t | tune_rf_band (uint16_t min, uint16_t max, uint8_t vco_num) |
PLL header file
#define PLL_IFIN PC5 |
PLL IF lock detect pin.
Referenced by pll_init(), and tune_if().
#define PLL_IFIN_DDR DDRC |
PLL IF lock detect direction port.
Referenced by pll_init().
#define PLL_IFIN_PIN PINC |
PLL IF input port.
Referenced by tune_if().
#define PLL_IFIN_PORT PORTC |
PLL IF output port.
Referenced by pll_init().
#define PLL_RFIN PC0 |
PLL RF lock detect pin.
Referenced by pll_init(), and tune_rf().
#define PLL_RFIN_DDR DDRC |
PLL RF lock detect direction port.
Referenced by pll_init().
#define PLL_RFIN_PIN PINC |
PLL RF input port.
Referenced by tune_rf().
#define PLL_RFIN_PORT PORTC |
PLL RF output port.
Referenced by pll_init().
#define pll_set_if | ( | x, | |
n | |||
) | pll_set_freq(x, n, 0x4); |
Referenced by test_pll2_if(), tune_if(), and tune_rf_band().
#define pll_set_rf | ( | x, | |
n | |||
) | pll_set_freq(x, n, 0x1); |
Referenced by test_pll2_rf(), tune_rf(), and tune_rf_band().
#define PLLCLK PD5 |
PLL clock pin.
Referenced by pll_init(), and pll_tx().
#define PLLCLK_DDR DDRD |
PLL clock direction port.
Referenced by pll_init().
#define PLLCLK_PORT PORTD |
PLL clock output port.
Referenced by pll_tx().
#define PLLDATA PD6 |
PLL data pin.
Referenced by pll_init(), and pll_tx().
#define PLLDATA_DDR DDRD |
PLL data direction port.
Referenced by pll_init().
#define PLLDATA_PORT PORTD |
PLL data output port.
Referenced by pll_tx().
#define PLLLE PB0 |
PLL enable pin.
Referenced by pll_init(), and pll_tx().
#define PLLLE_DDR DDRB |
PLL enable direction port.
Referenced by pll_init().
#define PLLLE_PORT PORTB |
PLL enable output port.
Referenced by pll_tx().
void pll_init | ( | void | ) |
Init PLL
Initialize PLL.
References PLL_IFIN, PLL_IFIN_DDR, PLL_IFIN_PORT, PLL_RFIN, PLL_RFIN_DDR, PLL_RFIN_PORT, pll_tx(), PLLCLK, PLLCLK_DDR, PLLDATA, PLLDATA_DDR, PLLLE, and PLLLE_DDR.
Referenced by main(), test_pll2_if(), and test_pll2_rf().
void pll_set_freq | ( | uint16_t | rf_freq, |
uint8_t | prescaler, | ||
uint8_t | reg | ||
) |
Set PLL frequency and prescaler
rf_freq | RF frequency to set |
prescaler | PLL prescaler |
reg | PLL stage to use, RF or IF |
References pc_putc(), pc_puts_P(), pll_tx(), and putnum_ud().
void pll_set_rcounter | ( | uint16_t | rcounter | ) |
Set reference counter
Set PLL reference counter.
rcounter | Reference counter value |
References pll_tx().
void pll_tx | ( | uint32_t | data, |
uint8_t | addr | ||
) |
Send data to PLL
Send data word to specific PLL address.
data | Data word to send |
addr | PLL register address |
References PLLCLK, PLLCLK_PORT, PLLDATA, PLLDATA_PORT, PLLLE, and PLLLE_PORT.
Referenced by pll_init(), pll_set_freq(), pll_set_rcounter(), and test_pll1().
uint8_t tune_if | ( | uint16_t | freq | ) |
Tune VCO2 frequency
Tune VCO2 to specific frequency using the PLL.
freq | Frequency to tune. |
References BANDWADJ2_RES, delay_ms(), pc_putc(), pc_puts_P(), PLL_IFIN, PLL_IFIN_PIN, pll_set_if, POWERCTL2, POWERCTL2_PORT, putnum_ud(), and set_resistor().
Referenced by tune_rf_band().
uint8_t tune_rf | ( | uint16_t | freq | ) |
Tune VCO1 frequency
Tune VCO1 to specific frequency using the PLL.
freq | Frequency to tune. |
References BANDWADJ1_RES, delay_ms(), pc_putc(), pc_puts_P(), PLL_RFIN, PLL_RFIN_PIN, pll_set_rf, POWERCTL1, POWERCTL1_PORT, putnum_ud(), and set_resistor().
Referenced by tune_rf_band().
uint8_t tune_rf_band | ( | uint16_t | min, |
uint16_t | max, | ||
uint8_t | vco_num | ||
) |
Tune RF stage to frequency bandwidth
Tune given VCO to specific frequency bandwidth.
min | Minimum frequency to tune. |
max | Maximum frequency to tune. |
vco_num | Number of VCO, 0 or 1 |
References BANDWADJ1_RES, BANDWADJ2_RES, delay_ms(), pc_puts_P(), pll_set_if, pll_set_rf, putnum_ud(), set_resistor(), set_sawtooth_high(), set_sawtooth_low(), tune_if(), and tune_rf().