PCB thermals vs current capacity

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pstemari
 
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Joined: Sun Mar 21, 2010 6:10 pm

PCB thermals vs current capacity

Post by pstemari »

Does anyone have a good feel for when it's appropriate to suppress thermal generation in Eagle, and the extent to which they limit the current going through a pad?

I'm laying out a combination lipo charger/boost SWPS, using big honkin' polygons for vin/switching/vout, but the SMD pads for the inductor, diode, and switcher IC all have thermals isolating them from the polygons. How much are those thermals going to act as choke points and overheat and/or fail? I'd like to run a max of 1 amp through them.

The attachment shows the top copper and the yellow arrows indicate the main current path.
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topcopper.png
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westfw
 
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Joined: Fri Apr 27, 2007 1:01 pm

Re: PCB thermals vs current capacity

Post by westfw »

0) The theory is that thermals are really short, so they have very little resistance even if narrow.
There are standards for trace width. http://www.armisteadtechnologies.com/trace.shtml says that with 1oz copper, you only need a 10mil trace if you're willing to live with a 10C temp rise. Regardless of length. So if you have four spokes on each pad, with "heat sinking" at either end, I think it would be difficult to get into trouble while staying within normal design rules. (2.5mil traces?!)

1) You can change the width of the thermals by changing the width of the line used to draw the polygon.

2) You can of course overlay the thermals with thicker explicitly added traces. Or add additional traces.

3) I frequently leave thermals turned off, but that's mostly for TH designs...

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